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| 2N7002KDW 60V N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES * RDS(ON), VGS@10V,IDS@500mA=3 * RDS(ON), VGS@4.5V,IDS@200mA=4 * Advanced Trench Process Technology * High Density Cell Design For Ultra Low On-Resistance * Very Low Leakage Current In Off Condition * Specially Designed for Battery Operated Systems, Solid-State Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc. * ESD Protected 2KV HBM * Component are in compliance with EU RoHS 2002/95/EC directives MECHANICALDATA * Case: SOT-363 Package * Terminals : Solderable per MIL-STD-750,Method 2026 * Marking : K27 6 5 4 1 2 3 Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA M E TE R D r a i n- S o ur c e Vo l t a g e G a t e - S o ur c e Vo l t a g e C o nt i nuo us D r a i n C ur r e nt P ul s e d D r a i n C ur r e nt 1) S ym b o l VD S VGS ID ID M TA = 2 5 O C TA = 7 5 O C PD TJ , TS T G RJ A Li mi t 60 +20 11 5 800 200 120 -5 5 to + 1 5 0 625 U ni t s V V mA mA mW O M a xi m um P o w e r D i s s i p a t i o n O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e R a n g e Junction-to Ambient Thermal Resistance(PCB mounted)2 C O C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 5 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE STAD-JAN.11.2007 PAGE . 1 2N7002KDW ELECTRICALCHARACTERISTICS P a ra me te r S ta ti c D r a i n- S o ur c e B r e a k d o w n Vo l t a g e G a t e Thr e s ho l d Vo l t a g e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e Ze r o G a t e Vo l t a g e D r a i n C ur r e nt Gate Body Leakage Forward Transconductance D i o d e F o rwa rd Vo lta g e Dynamic V D S = 1 5 V , ID = 2 0 0 m A VGS=4.5V VD D =30V , RL =150 ID =200mA , VG E N =10V RG =10 BVD SS V G S (th) RD S (o n) RD S (o n) ID S S IG S S g fS VSD V G S = 0 V , ID = 1 0 u A V D S = V G S , ID = 2 5 0 u A VG S =4.5V, I D =200mA VG S =10V, I D =500mA VD S =60V, VG S =0V V G S =+ 2 0 V , V D S = 0 V V D S = 1 5 V , ID = 2 5 0 m A IS = 2 0 0 m A , V G S = 0 V 60 1 100 0 .8 2 2 .5 4 .0 3.0 1 +10 1 .3 uA uA mS V V V S ym b o l Te s t C o n d i t i o n M i n. Ty p . M a x. U ni t s To t a l G a t e C h a r g e Qg - - 0 .8 nC Tu r n - O n D e l a y Ti m e Tu r n - O f f D e l a y Ti m e In p u t C a p a c i t a n c e O ut p ut C a p a c i t a nc e R e v e r s e Tr a n s f e r C a p a c i t a n c e to n to ff Ciss Coss C rs s - - 20 ns 40 35 10 5 pF V D S =2 5 V, V G S =0 V f=1 .0 MHZ - Switching Test Circuit VIN VDD RL Gate Charge Test Circuit VGS VDD RL VOUT RG 1mA RG STAD-JAN.11.2007 PAGE . 2 2N7002KDW Typical Characteristics Curves (TA=25OC,unless otherwise noted) ID - Drain-to-Source Current (A) V GS = 10V ~ 6.0V 1 5.0V 4.0V I D - Drain Source Current (A) 1.2 1.2 1 0.8 0.6 0.4 V DS=10V 0.8 0.6 0.4 3.0V 0 0 1 2 3 4 5 T J=25 O C 0.2 0 0 1 2 3 4 5 6 0.2 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Fig. 1-TYPICAL FORWARD CHARACTERISTIC FIG.1- Output Characteristic FIG.2- Transfer Characteristic 5 5 R DS(ON) - On-Resistance ( W ) R DS(ON) - On-Resistance ( W ) 4 3 2 1 0 4 3 V GS=4.5V V GS=10V I D=500mA 2 1 I D=200mA 0 0 0.2 0.4 0.6 0.8 1 2 3 4 5 6 7 8 9 10 ID - Drain Current (A) V GS - Gate-to-Source Voltage (V) FIG.3- On Resistance vs Drain Current 1.8 1.6 1.4 1.2 1 0.8 0.6 -50 FIG.4- On Resistance vs Gate to Source Voltage RDS(ON) - On-Resistance(Normalized) V GS=10V I D=500mA -25 0 25 50 75 100 o 125 150 TJ - Junction Temperature ( C) FIG.5- On Resistance vs Junction Temperature STAD-JAN.11.2007 PAGE . 3 2N7002KDW 10 Vgs Qg V GS - Gate-to-Source Voltage (V) 8 6 4 2 0 V DS=10V I D=250mA Vgs(th) Qsw Qg(th) Qgs Qgd 0 0.2 0.4 0.6 0.8 1 Qg Qg - Gate Charge (nC) Fig.6 - Gate Charge Waveform Vth - G-S Threshold Voltage (NORMALIZED) Fig.7 - Gate Charge 88 86 84 82 80 78 76 74 72 -50 I D=250uA BVDSS - Breakdown Voltage (V) 1.2 1.1 1 0.9 0.8 0.7 -50 I D=250uA -25 0 25 50 75 100 o 125 150 -25 0 25 50 75 100 o 125 150 TJ - Junction Temperature ( C) TJ - Junction Temperature ( C) Fig.8 - Threshold Voltage vs Temperature Fig.9 - Breakdown Voltage vs Junction Temperature 10 IS - Source Current (A) V GS=0V 1 0.1 T J=125 O C 25 O C -55 O C 0.01 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD - Source-to-Drain Voltage (V) Fig.10 - Source-Drain Diode Forward Voltage STAD-JAN.11.2007 PAGE . 4 2N7002KDW MOUNTING PAD LAYOUT ORDER INFORMATION * Packing information T/R - 10K per 13" plastic Reel T/R - 3K per 7" plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2007 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. STAD-JAN.11.2007 PAGE . 5 |
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